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FAN8741/FAN8742
Spindle motor and 6-CH actuator driver [Spindle(PWM), Sled 2-CH(PWM) 4-CH(Linear)]
FAN8741 Features
Common
* * * * Built-in thermal shutdown circuit (TSD) 8 Independent voltage sources Corresponds to 3.3V or 5V DSP 4 selectable mute
Description
The FAN8741G/FAN8742G is a monolithic IC suitable for a 3-phase BLDC(Brush Less Direct Current) spindle motor driver with PWM, 2-ch motor drivers with PWM for sled motor and 4-ch linear drivers which drive the focus actuator, tracking actuator, tilt actuator and loading motor of the optical media applications. Since FAN8741G/FAN8742G aims to high-speed/high-density optical media applications its power stage is made by D-MOS transistors which have extremely low RDS on. This enables less heat generation and guarantees more reliable lifetime.
Spindle
* * * * * Output PWM mode control FG output: open collector type Selectable brake(short & reverse brake) Built in hall bias 180o commutation(compatible with conventional BLDC spindle motor) * Built in arm short preventer
56-SSOP
BTL(Sled 2-channels)
* Output PWM mode control * Built in arm short preventer
BTL(Other 4-channels)
* Output LINEAR mode control
Typical Applications
* * * * * * * Compact disk ROM (CD-ROM) Compact disk RW (CD-RW) Digital video disk ROM (DVD-ROM) Digital video disk RAM (DVD-RAM) Digital video disk Player (DVDP) Other compact disk media Game console
Ordering Information
Device FAN8741G FAN8741GX FAN8742G FAN8742GX Package 56-SSOP 56-SSOP 56-SSOP 56-SSOP Operating Temp. -25C ~ +75C -25C ~ +75C -25C ~ +75C -25C ~ +75C
X:Tape & Reel type
FAN8741G:FG3X FAN8742G:FG1X
Rev. 1.0.2
(c)2004 Fairchild Semiconductor Corporation
FAN8741/FAN8742
Pin Assignments
DGND VCP CP2 CP1 SVCC1 FG DIR SPIN VDD IN3 IN4 PGND5 DO4DO4+ PVCC3 DO3DO3+ DO2DO2+ DO1DO1+ PGND4 IN1 IN2 PVCC1 PVCC2 SLIN1 SLIN2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
56 55 54 53 52 51 50 49 48 47 46 45 44
VM1 HU+ HUHV+ HVHW+ HWVH PGND1 U RSP1 V PGND2 W RSP2 SL1+ SL1SL2+ SL2PGND3 REF MUTE1 MUTE2 RSL1 RSL2 VM2 SVCC2 SGND
FAN8741G/ FAN8742G
43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
2
FAN8741/FAN8742
Pin Definitions
Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Pin Name DGND VCP CP2 CP1 SVCC1 FG DIR SPIN VDD IN3 IN4 PGND5 DO4 DO4 + PVCC3 DO3 DO3 + DO2 DO2 + DO1 DO1 + PGND4 IN1 IN2 PVCC1 PVCC2 SLIN1 SLIN2 I/O P A A A P O O A P A A P A A P A A A A A A P A A P P A A Pin Function Description Ground for digital block Charge pumped voltage Charge pump capacitor2 Charge pump capacitor1 Power supply for signal block Spindle frequency generator (FAN8741G:3X, FAN8742G:1X) Spindle rotational direction output Spindle channel input Power supply for digital block Channel 3 input Channel 4 input Power ground for BTL CH3/4 Channel 4 drive output Channel 4 drive output + Power supply for BTL CH4 Channel 3 drive output Channel 3 drive output + Channel 2 drive output Channel 2 drive output + Channel 1 drive output Channel 1 drive output + Power ground for BTL CH1/2 Channel 1 input Channel 2 input Power supply for BTL CH1/2 Power supply for BTL CH3 Sled channel 1 input Sled channel 2 input
3
FAN8741/FAN8742
Pin Definitions(continued)
Pin Number 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 Pin Name SGND SVCC2 VM2 RSL2 RSL1 MUTE2 MUTE1 REF PGND3 SL2SL2+ SL1SL1+ RSP2 W PGND2 V RSP1 U PGND1 VH HWHW+ HVHV+ HUHU+ VM1 I/O P P P A A A A A P A A A A A A P A A A P A A A A A A A P Pin Function Description Signal ground for BTL signal block Power supply for BTL Pre driver Power supply for sled Sled current sensing 2 Sled current sensing 1 Mute input 2 Mute input 1 Reference voltage input Power ground for sled channels Sled channel 2 drive output Sled channel 2 drive output + Sled channel 1 drive output Sled channel 1 drive output + Spindle current sensing 2 3-phase output W for spindle Power ground 2 for spindle channel 3-phase output V for spindle Spindle current sensing 1 3-phase output U for spindle Power ground 1 for spindle channel Hall bias Hall signal input(Hw-) Hall signal input(Hw+) Hall signal input(Hv-) Hall signal input(Hv+) Hall signal input(Hu-) Hall signal input(Hu+) Power supply for spindle
4
FAN8741/FAN8742
Internal Block Diagram
MUTE1 35 MUTE2 34 SVCC1 5 DGND 1
Mute Selection &Spindle brake sel.
Reverse Detect
7 DIR 6 FG 55 HU+
Hall Amp
Freguency Generator
VDD 9 Spindle Direction VCP 2 CP2 3 CP1 4 IN3 10 IN4 11 PVCC3 15
54 HU- 53 HV+ 52 HV- 51 HW+ 51 HW- Hall bias 49 VH 56 VM1
Charge pump & Oscillator
VCP OSC
TSD
Level shift
LPF
VCP
42 RSP2
Commutator & Power drive
46 RSP1 47 U 45 V 43 W 44 PGND2 48 PGND1 8 SPIN 36 REF
DO4- 13 DO4+ 14
10k 20k
PWM Control
OSC
PGND5 12 PVCC2 26
BTL driver
REF
DO3- 16 DO3+ 17 PVCC1 25
BTL driver
LPF
VCP
31 VM2 33 RSL1 41 SL1+ 40 SL1- 37 PGND3
PWM Control
OSC
4
H bridge
DO2- 18 DO2+ 19
BTL driver
LPF
VCP
32 RSL2
DO1- 20 DO1+ 21 PGND4 22 IN1 23 IN2 24
BTL driver
10k 10k
Flip Flop IOMAX
OSC
Drive Logic
39 SL2+ 38 SL2-
PWM Control
H-bridge
28 SLIN2 27 SLIN1 30 SVCC2 29 SGND
5
FAN8741/FAN8742
Equivalent Circuits
Charge Pump Outputs
SVCC2 SVCC2 SVCC2
FG/DIR Outputs
SVCC1
6
4
3
2
7
Spin Input
SVCC1
50 SVCC1 1K
Hall Inputs
SVCC1 1K 51 53 55 3K 3K
SVCC1 1K 8 10K 1K
52 54
Ref
Hall Bias Input
SVCC1
Mute1 & 2 Inputs
SVCC2 40K 40K
49
34 35
60K
Spindle Drive Outputs
46 42
Spindle Current Sensing Input
VM1
42
47
45
43
48
44
6
FAN8741/FAN8742
Equivalent Circuits(continued)
Sled 1 & 2 Inputs
SVCC2
Sled Drive Outputs
32 33
SVCC2 27 28 10K 1K 1K
Ref
39 41
38 40
37
CH1/2/3/4(BTL Channels) Inputs
SVCC2
Sled 1 & 2 Current Sensing Inputs
VM2
SVCC2
32
10 11 23 24 10K 1K 1K
Ref
33
Reference Input
CH4 Outputs
SVCC2 PVCC3
SVCC2
36 1K
13 14
CH3 Outputs
SVCC2 PVCC2
CH1 & 2 Outputs
SVCC2 PVCC1
16 17
18 20 19 21
7
FAN8741/FAN8742
Absolute Maximum Ratings (Ta = 25C)
Parameter Supply Voltage (Signal block) Supply Voltage (Digital block) Supply Voltage (Spindle driver) Supply Voltage (Sled driver) Supply Voltage (BTL driver) Supply Voltage (BTL Pre driver) Power dissipation Operating Temperature Range Storage temperature Range Maximum Output Current (Spindle) Maximum Output Current(CH1/2/3/4) Maximum Output Current (Sled)
NOTE:
Symbol SVCC1max VDDmax VM1max VM2max PVCC1,2,3max SVCC2max PD TOPR TSTG IOmax1 IOmax2 IOmax3 Case 2
Value 7 7 15 15 15 15 3.1/4.7 -20 ~ +75 -40 ~ +150 2.0 1.0 1.0
Unit V V V V V V W C C A A A Remark
Pd is measured base on the JEDEC/STD(JESD 51-2)
Case 1
Power plane(Cu) PCB(glass-epoxy) GND plane(Cu)
Pd=3.1W
Pd=4.7W
1. Case 1: Single layer PCB with 1 signal plane only, PCB size is 76mm x 114mm x 1.6mm. 2. Case 2: Multi layer PCB with 1 signal, 1 power and 1 ground planes, PCB size is 76mm x 114mm x 1.6mm, Cu plane sizes for power and ground is 74mm x 62mm x 0.035mm. 3. These are simulation datum. 4. Power dissipation is reduced by -24.8mW/C for using above Ta=25C in case 1. 5. Power dissipation is reduced by -37.6mW/C for using above Ta=25C in case 2. 6. Do not exceed PD and SOA (Safe Operating Area).
8
FAN8741/FAN8742
Power Dissipation Curve
Pd [mW] 5,000 4,000 3,000 2,000 1,000 0
case1 case2
SOA
0 25 50 85 100 125 150 175
Ambient Temperature, Ta [C]
Recommended Operating Conditions (Ta = 25C)
Parameter Supply Voltage (Spindle Signal block) Supply Voltage (Digital block) Supply Voltage (Spindle driver) Supply Voltage (Sled driver) Supply Voltage (BTL driver) Supply Voltage (BTL signal block) Output current(Spindle) Output current(Focus, Tracking, Loading) Output current(Sled) Symbol SVCC1 VDD VM1 VM2 PVCC1,2,3 SVCC2 IO1 IO2 IO3 Min. 4.5 4.5 4.5 4.5 4.5 4.5 Typ. 5 5 12 12 12 12 1.0 0.5 0.5 Max. 5.5 5.5 13.2 13.2 SVCC2 13.2 1.5 0.8 0.8 Unit V V V V V V A A A
9
FAN8741/FAN8742
ELECTRICAL CHARACTERISTICS (Ta = 25C)
(Ta=25OC, SVCC1=VDD=PVCC1=VM2=5V,VM1=SVCC2=PVCC2=PVCC3=12V unless otherwise noted) Parameter COMMON PART Quiescent Circuit Current 1 Quiescent Circuit Current 2 Quiescent Circuit Current 3 Mute Low Voltage Mute High Voltage Mute Input Current Charge Pump Voltage 1 Charge Pump Voltage 2 THERMAL SHUTDOWN Operating Temperature* Hysteresis Temperature* SPINDLE DRIVE PART Control Input Deadzone11 Control Input Deadzone12 Control Voltage Input Range Output Gain Output On Resistance(upper) Output On Resistance(lower) Output Limit Current Hall Amp Common Mode Input Range Minimum Hall Input Level* Hall Bias Output Voltage Hall Bias Input Current FG Low Voltage DIR Low Voltage SLED DRIVE PART Control Input Deadzone21 Control Input Deadzone22 Output Gain Output On Resistance(upper) Output On Resistance(lower) Output Limit Current * : Design guarantee specification 10 VDZSLF VDZSLR GMSL RONUSL RONLSL ILIMITSL SLIN1/SLIN2 > VREF SLIN1/SLIN2 < VREF GMSL=GVO/RCSSL, RCSSL=1, GVO=1[V/V] Io=250mA Io=250mA RCSSL=1 0 -30 0.85 15 -15 1.0 1.0 1.0 0.5 30 0 1.15 mV mV A/V A VDZSPF VDZSPR VINSP GMSP RONUSP RONLSP ILIMITSP VHCOM VHMIN VHB IVH VFGL VDIRL IFG=3mA IDIR=3mA IHB=10mA GMSP=GVO/RCSSP, RCSSP=0.33, GVO=1[V/V] Io=500mA Io=500mA RCSSP=0.33 SPIN>VREF SPINFAN8741/FAN8742
ELECTRICAL CHARACTERISTICS (Ta = 25C, continued)
(Ta=25OC, SVCC1=VDD=PVCC1=VM2=5V,VM1=SVCC2=PVCC2=PVCC3=12V unless otherwise noted) Parameter Output Saturation Voltage H Output Saturation Voltage L Closed Loop Voltage Gain Output Offset Voltage Output Saturation Voltage H Output Saturation Voltage L Closed Loop Voltage Gain Output Offset Voltage CH1-CH3 Gain Difference Symbol VOHFT12 VOLFT12 GVFT12 VOFFT12 VOHFT34 VOLFT34 GVFT34 VOFFT34 G1TO3 Condition IO=500mA IO=500mA VREF=IN1=IN2=1.65V IO=500mA IO=500mA VREF=IN3=IN4=1.65V GVFT12 - GVFT34 16.5 -50 -0.5 16.5 -50 Min. Typ. 0.5 0.5 18 1.0 0.5 18 0 19.5 50 0.5 19.5 50 Max. Units V V dB mV V V dB mV dB
CH1,CH2 DRIVE PART (TYPICALLY ACTUATOR DRIVER)
CH3,CH4 DRIVE PART (TYPICALLY TILT,LOADING DRIVER)
CH1,CH3 GAIN DIFFERENCE SPEC (TYPICALLY FOCUS,TILT DRIVER)
11
FAN8741/FAN8742
Application Information
1. TORQUE CONTROL & OUTPUT CURRENT CONTROL OF 3-PHASE BLDC MOTOR
VM1
Inside IC
+ Vcs +
10K
LPF
-
Rcs
Torque AMP
VAMP R IOMAX Clock Generator Hall sensor S Q Commutator 6
Io Driver M
REXT1 SPIN
10K
VREF
1) By amplifying the voltage difference between VREF and SPIN from Servo IC(or DSP), the Torque AMP produces the input voltage(VAMP) which means input current command. 2) The output current (IO) is converted into the voltage (VCS) through the sense resistor (RCS) and compared with the VAMP. 3) The clock generator always make the RS latch become set periodically, this enables output driver on state and when the VCS and the VAMP is equal the state becomes off. 4) By the negative feedback loop, the sensed output voltage VCS equals to the VAMP. 5) Commuting sequence is selected by hall sensor input, and the minimum hall input is 50mV. 6) The gain and limit current is calculated as below table.(Gvo=VAMP/(SPIN-VREF)=1[V/V]). Limit current
0.5---------Rcs
Input/Output gain[A/V]
G VO 10K ---------------------------------------- * ------------R + 10K R CS EXT1
Remark
---------------------------------------R EXT1 + 10K
10K
is gain scaler
7) Spindle block adopts 180o commutation methodology which is full compatible with conventional BLDC spindle motor. Users don't need to change or modify their spindle motor. 8) The range of the input voltage is as shown below when Rcs=0.33, REXT1=0.
Current [A] 1.5
Dead Dead zone- zone+ GMSP=GVO / RCS
Rotation Reverse Forward MUTE2 =H MUTE2 =L,open SPIN > VREF SPIN < VREF SPIN VREF Forward rotation Reverse brake Short brake Short brake
-50mV 0 50mV The input range of SPIN is 0 V ~ 5 V
SPIN-VREF
12
FAN8741/FAN8742
2. TORQUE CONTROL & OUTPUT CURRENT CONTROL OF SLED MOTOR(2-PHASE STEP MOTOR)
VM2
Inside IC
+ Vcs +
10K
LPF
-
Rcs
Torque AMP
VAMP R IOMAX Clock Generator S Q Drive Logic 4
Io Driver M
REXT1 SLIN1 (or SLIN2)
10K
VREF
1) By amplifying the voltage difference between VREF and SLIN1(or SLIN2) from Servo IC(or DSP), the Torque AMP produces the input voltage(VAMP) which means input current command. 2) The output current (IO) is converted into the voltage (VCS) through the sense resistor (RCS) and compared with the VAMP. 3) The clock generator always make the RS latch become set periodically, this enables output driver on state and when the VCS and the VAMP is equal the state becomes off. 4) By the negative feedback loop, the sensed output voltage VCS equals to the VAMP. 5) To avoid output upper and lower transistor's short through, switch trick is needed. Turn on delay time is 1usec, so the phase delay time,when change the current direction is 1usec. 6) The gain and limit current is calculated as below table.(Gvo=VAMP/[SLIN1(or SLIN2)-VREF]=1[V/V] Torque limit current
0.5---------Rcs
Input/Output gain[A/V]
G 10K VO ---------------------------------------- * ------------R + 10K R CS EXT1 ---------------------------------------R EXT1 + 10K
Remark
10K
is gain scaler
8) The range of the torque voltage is as shown below when Rcs=1, REXT1=0.
Current [A] 0.5
Dead Dead zone- zone+ GMSL=GVO / RCS
Reverse
Forward
-15mV 0
15mV
SLIN1(or SLIN2)-VREF
13
FAN8741/FAN8742
3. CHANNEL 1~4 SCHEMATIC
power amp 20k Command 10k
M
Level shift
ref
* The reference voltage(ref) is given externally through pin36. * The input OP-amp output signal is amplified by (20K/10K) times and then fed to the power amplifier. The gain of power amplifier is 4 so the total max gain of channel 1~4 is 8. 4. MUTE INPUTS FAN8741 has 2 independent mute pins those are, pin #14(MUTE1) and pin #13(MUTE2). Detailed logics are as below. MUTE1 H H L L MUTE2 H L H L Disable SPINDLE SLED Enable Enable Enable Disable Disable CH1/2/3 CH4(typ. loading driver) Disable Disable Enable SPINDLE brake type Reverse brake when SPIN(Note) To make spindle short brake, MUTE2 goes low and spindle command must not be in deadzone(50mV). When the spindle command is within deadzone, spindle block goes to disable mode even though MUTE2 is low.
14
FAN8741/FAN8742
5. REVERSE ROTATION PREVENTION(SPINDLE)
SPIN VREF
+ -
Current Sense Amp
HV+ HV-
+ A D CK D-F/F Q
Low Active
HW+ HW-
+ -
Gain Controller
Driver
M
1) As in the state of the forward rotation, the D-F/F output, Q is HIGH and the motor rotates normally. At this state, if the control input is changed such that VREF>SPIN, then the motor rotates slowly by the reverse commutation in the Driver. When the motor rotates in reverse direction, the D-F/F output becomes Low and the OR Gate output, becomes LOW. This prevents the motor from rotating in reverse direction. The operation principle is shown in the table and the flow chart. Rotation Forward Reverse HV H L HW HL HL D-F/F (Q) H L Reverse Rotation Preventer VREFSPIN Brake and Stop
Forward rotation at VREF< SPIN Rotating speed is decreased due to reverse torque at VREF>SPIN and appropriate mute combination. (Motor still rotates forward) At the moment that the motor rotates in reverse, the reverse rotation preventer makes the output power stage same as short brake that is lower 3 power transistors are full turn on. Rotating reverse at short time due to motor inertia Power stage remains short brake scheme until forward rotation command come in
15
FAN8741/FAN8742
6. HALL SENSOR CONNECTION
SVcc1
SVcc1
HALL 1 HALL 1 HALL 2 HALL 3
HALL 2
HALL 3
15 VH
15 VH
7. PWM FREQUENCY PWM operation of spindle and sled channels are controlled by internal clock generator. Its typical frequency is 100KHz.
8. ETC 1) FG, DIR output are open-collector type. 2) By-pass capacitors are recommended at hall sensor inputs, power supply inputs.
16
FAN8741/FAN8742
9. SPINDLE PART INPUT-OUTPUT TIMING CHART
HU+
30o
HU
HUHV+
HV
HVHW+
HW
HW-
U current
(HU-)+(HV+)
0[A]
U voltage 0[V]
V current
(HV-)+(HW+)
0[A]
V voltage 0[V]
W current
(HW-)+(HU+)
0[A]
W voltage 0[V]
17
FAN8741/FAN8742
Typical Application Circuits
1 DGND 2 VCP
0.1F 0.1F
VM1 56 HU+ 55 HU- 54 HV+ 53
HALL-V
VM1 (for spindle,12V)
HALL-U
R_hall1 5V
3 CP2 4 CP1 5 SVCC1
HV- 52 HW+ 51
HALL-W
SVCC1(5V) 10k(full up R)
6 FG
10k(full up R)
7 DIR 8 SPIN 9 VDD 10 IN3
HW- 50
R_hall2
R1
VH 49 PGND1 48 U 47 RSP1 46 V 45 PGND2 44 W 43 RSP2 42 SL1+ 41 SL1- 40 SL2+ 39 SL2- 38 PGND3 37 REF 36
0.1F
R2 R3
VDD (5V) RSP
11 IN4 12 PGND5
FAN8741G/ FAN8742G
Loading motor
13 DO4-
M
14 DO4+ 15 PVCC3
PVCC3(5~12V)
16 DO3-
3-Phase BLDC Motor
Tilt actuator Tracking actuator Focus actuator
17 DO3+ 18 DO2- 19 DO2+ 20 DO1- 21 DO1+ 22 PGND4
M Sled(stepping) Motor
Component Reference value Remark R1~R7 10k Gain scaling resistors. Please refer to 12,13,14 pages. R_hall1,R_hall2 100 Hall bias resistors RSL1,RSL2 1 Rcs at sled driver. (I_limit=0.5A,Gain=0.5A/V@R6,R7 are 10k) RSP 0.33 Rcs at spindle driver. (I_limit=1.5A,Gain=1.5A/V@R1 is 10k) Bypass electrolytic capacitors(47~100F) are recommended at power supply inputs.
DSP or controller
18
MUTE1 35 MUTE2 34 RSL1 33 RSL2 32 VM2 31 SVCC2 30 SGND 29
SVCC2(5~12V) (SVCC2 PVCC1,2,3) RSL1 RSL2 VM2 (for sled, 5~12V)
R4 R5
23 IN1 24 IN2 25 PVCC1
PVCC1(5~12V)
26 PVCC2
PVCC2(5~12V)
27 SLIN1
R6
28 SLIN2
R7
FAN8741/FAN8742
Package Dimension(exposed area is exposed to the top)
19
FAN8741/FAN8742
DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.
www.fairchildsemi.com 7/8/04 0.0m 001 Stock#DSxxxxxxxx 2004 Fairchild Semiconductor Corporation
2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

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